S-TouchTM Capacitive Touch Controller PCB Layout Guide 6

Following these basic design guidelines for PCB design and layout can make capacitive sensing applications more reliable.

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How to Design with Capacitive Digital Isolators 1

Currently, safety regulations regarding the use and design of electronic devices are continuously emerging,

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How to Design with Capacitive Digital Isolators 2

Low speed paths have several more functional components than high-speed paths.

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How to Design with Capacitive Digital Isolators 3

Due to the 1 to 2ns rise and fall time of digital isolators, they are often prone to signal reflection in long signal routing situations,

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How to Design with Capacitive Digital Isolators 4

Place the power layer beneath the ground layer. These two reference layers form an additional high-frequency bypass capacitor of approximately 100pF/in².

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How to Design with Capacitive Digital Isolators 5

Use 45-degree trace routing (or chamfered bends) instead of 90-degree bends to maintain effective trace impedance and avoid signal reflections.

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Total 373 Pages 2233 Records
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